Abstract: With the advances in the field of VLSI design, routing a net the basic function of Global routing and Detailed routing stages of Physical design are required to be conducted at the earliest. Many efficient algorithms are proposed to construct the Rectilinear Steiner Minimum Tree (RSMT) which routes the net and can be used in the estimation of wire-length and timing for Floor-planning and Placement stages of IC-design. RSMT connects the terminals of a net rectilinearly without considering the presence of obstacles in the routing region, but blockages like pre-routed nets, macro-cells, IP-blocks and others cannot be ignored as they form the major components of the routing area. This leads for the construction of an extended RSMT called Obstacle Avoiding Rectilinear Steiner Minimum Tree (OARSMT), many exact and heuristic algorithms are proposed for the construction of OARSMT based on approaches like Geo-Steiner, Look-up table, Extended-Hanan grid, Maze routing and Spanning graph. This paper discusses OARSMT algorithms that belongs to different approaches and makes a comparative study of the features and performance of OARSMT designs. Making way for the selection of the key features of the existing algorithms and to improve them in the new designs of OARSMT, to match with the current VLSI technologies.
Keywords: Rectilinear Steiner Tree, Obstacle Avoiding RST, Global Routing, VLSI design.