Abstract: MOSFETs have always been the workhorse of semiconductor industry, with passing decades the sizes of MOSFETs have been continuously decreasing. This is guided by decrease in the gate length or channel length. However decrease in channel length of planar MOSFETs has reached its saturation level due to short channel effects and DIBL. In this paper we have tried to present an electrical comparison between 32nm node technology and 20nm node technology of planar MOS structures. The structures have been fabricated using SILVACO TCAD software and study of threshold voltages and corresponding oxide thickness has been made.
Keywords: 35 nmPMOS, 20 nm PMOS, Threshold Voltage, Oxide Thickness, SILVACO TCAD, Athena.