Abstract: In nanoscale technology nodes Radiation induced multiple bit upsets are the major reliability. Functionality of the mapped design is permanently affected by the occurrence of such errors in the configuration frames of a field programmable gate arrays. Permanent effect of these errors can be avoided by periodic configuration scrubbing combined with a low cost error correction scheme is an efficient approach. In this paper, we present a low-cost error-detection code to detect MBUs in configuration frames as well as a generic scrubbing scheme to reconstruct the erroneous configuration frame based on erasure codes. The proposed scheme does not require any modification to the FPGA architecture. Implementation of the this scheme on a Xilinx Virtex-6 FPGA device shows that it can detect 100% of MBUs in the configuration frames with the recovery time which is comparable to the previous schemes and with only 3.3% resource occupation.
Keywords: MBU, configuration frames, erasure codes, scrubbing