Abstract: Content-Addressable Memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due to its ability to improve application performance by using parallel comparison to reduce search time. Although the use of parallel comparison results in reduced search time, it also significantly increases power consumption. Both low power NAND-type and high-speed NOR-type match-line (ML) schemes suffer from requirement of the precharge prior to the search. Recently, a precharge-free ML structure has been proposed but with inadequate search performance. In this brief, a Pre-computation Based Self-Controlled Precharge-Free CAM (PB-SCPF CAM) structure is proposed for high-speed applications. The SCPF architecture is useful in applications where search time is very crucial to design larger word lengths. The experimental results show that PB-SCPF approach can achieve on average 80% in delay reduction and 32% in power reduction. The major contribution of this paper is that it presents theoretical and practical proofs to verify that our proposed PB-SCPF CAM system can achieve greater power reduction without the need for a special CAM cell design. This implies that our approach is more flexible and adaptive for general designs.
Keywords: Content-Addressable Memory (CAM), ML delay, high speed search, Self-Controlled Precharge-Free CAM.