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This work is licensed under a Creative Commons Attribution 4.0 International License.
Mean-Shift Algorithm: Verilog HDL Approach
Mr.Rahul V.Shah, Mr.Amit Jain, Mrs.Ekata Mehul, Mr.Rutul B.Bhatt, Mr.Pinal Engineer
Object tracking, complexity in hardware ASIC, Mean Shift algorithm, Histogram, Bhattacharyya coefficient
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Abstract: Object tracking algorithms, when it comes to implementing it on hardware ASIC, it becomes difficult task, due to certain limitations in hardware. This paper shows how mean-shift algorithm is implemented in HDL along with the description of ports and interfaces.
Keywords: Object tracking, complexity in hardware ASIC, Mean Shift algorithm, Histogram, Bhattacharya coefficient
Keywords: Object tracking, complexity in hardware ASIC, Mean Shift algorithm, Histogram, Bhattacharya coefficient
How to Cite:
[1] Mr.Rahul V.Shah, Mr.Amit Jain, Mrs.Ekata Mehul, Mr.Rutul B.Bhatt, Mr.Pinal Engineer, βMean-Shift Algorithm: Verilog HDL Approach,β International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE)
This work is licensed under a Creative Commons Attribution 4.0 International License.