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A Comparative Analysis And An Implementation On The Pattern Generation Of A 3- Weighted And Adaptive Methods Of Pseudorandom Technique
S.RAGHUPATHI, N.MANIKANDA SRITHARAN Faculty Member (ECE / ENGG), IBRI College of Technology, IBRI, Sultanate of Oman PG Scholar, Shivani Institute of Technology, Trichy -9, Tamilnadu, India
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Abstract: Fault detection in VLSI circuit plays vital role in implementation of a design. Widely used, pseudo random Built- in-Self-Test (BIST) is taken into account for this research paper. The store of pseudorandom generators includes, among others, linear feedback shift registers (LFSRs), cellular automata, and accumulators driven by a constant value. Categories of pseudorandom BIST, the 3- weighted pattern Test Generation (TG) and Adaptive pattern Test Generation (TG) were been analyzed with various factors such as design,security,efficiency,performance and accuracy to define the appropriate method for the required design. Both the methods are applied to Scan Based process accumulation, for the above said comparison for the proposed scheme. The ultimate aim is to find the Reduction in Hardware overhead and the consumed time. On thorough observation the design is implemented through Spartan-3 FPGA.
Keywords: Pseudorandom, 3 weighted, Adaptive Test Generation (TG), Process Accumulation.
Keywords: Pseudorandom, 3 weighted, Adaptive Test Generation (TG), Process Accumulation.
How to Cite:
[1] S.RAGHUPATHI, N.MANIKANDA SRITHARAN Faculty Member (ECE / ENGG), IBRI College of Technology, IBRI, Sultanate of Oman PG Scholar, Shivani Institute of Technology, Trichy -9, Tamilnadu, India , âA Comparative Analysis And An Implementation On The Pattern Generation Of A 3- Weighted And Adaptive Methods Of Pseudorandom Technique,â International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE)
