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International Journal of Advanced Research in Computer and Communication Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2278-1021ISSN Print 2319-5940Since 2012
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← Back to VOLUME 5, ISSUE 4, APRIL 2016

Analytical Study of Multipliers for High Speed Applications

Amit A. Bhutada, Prof. Sanjay L. Haridas, Prof. Sanjay Tembhurne

DOI: 10.17148/IJARCCE.2016.54253

Abstract: Convolution is having wide area of application in Digital Signal Processing. Convolution helps to estimate the output of a system with arbitrary input, with knowledge of impulse response of the system. Linear systems characteristics are completely specified by the systems impulse response, as governed by the mathematics of convolution. Convolution and deconvolution is central to many applications of Digital Signal Processing and Image Processing. Primary requirement of any application to work fast is that increase the speed of their basic building block. Multiplier is the heart of convolution. It is most important but, slowest unit of the system and consumes much time in the system. Many methods are invented to improve the speed of the multiplier, amongst all vedic multiplier is under focus because of faster working and low power consumption. In this project we have implemented the high speed convolution system using vedic mathematics.



Keywords: Convolution, Vedic Mathematics, VHDL.

How to Cite:

[1] Amit A. Bhutada, Prof. Sanjay L. Haridas, Prof. Sanjay Tembhurne, “Analytical Study of Multipliers for High Speed Applications,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE), DOI: 10.17148/IJARCCE.2016.54253