Design & Implementation of 3-Bit High Speed Flash ADC for Wireless LAN Applications

Abstract: Analog-to-digital (ADC) converter has become a very important part of electronics in the current digital world as they have a wide variety of applications. Among all the ADC�s available, the Flash ADC is one of the fastest ADC but a main drawback of this ADC is its power consumption. So, the main objective of this paper is to implement a high speed low power Flash ADC. A design with 3-bit resolution has been implemented using seven OTA based comparators with a reference voltage of 250mV and a high speed encoder have been implemented using four full adders upon which the integration of different block ADC has been designed. All the circuits are simulated using 180nm technology in Cadence Virtuoso Design environment. The supply voltage is 1.8v.Analog output of each comparator depending upon the comparison between the input and the reference voltage is fed to the encoder and finally the compressed digital output is obtained.

Keywords: Flash ADC, Comparator, OTA, Thermometer to Binary encoder, CMOS 180 nm Technology.