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This work is licensed under a Creative Commons Attribution 4.0 International License.
Design and implementation of 4-bit flash ADC using folding technique in cadence tool
S D.Panchal, Dr. S.S.Gajre, Prof. V.P.Ghanwat SGGS Institute of Engineering and Technology, Nanded, Maharashtra, India
Abstract: In this paper, we design a pipelined flash Analog-to- Digital Converter (ADC) to achieve high speed using 0.18umCMOS technology. The results obtained are also presented here. The physical circuit is more compact than the previous design.Power, processing time, and area are all minimized. This design can be used for modem high speed ADC applications.
Keywords: CMOS comparator, CMOS Analog IntegratedCircuit, Flash Converter, priority encoder.
Keywords: CMOS comparator, CMOS Analog IntegratedCircuit, Flash Converter, priority encoder.
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This work is licensed under a Creative Commons Attribution 4.0 International License.How to Cite:
[1] S D.Panchal, Dr. S.S.Gajre, Prof. V.P.Ghanwat SGGS Institute of Engineering and Technology, Nanded, Maharashtra, India, βDesign and implementation of 4-bit flash ADC using folding technique in cadence tool,β International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE)