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International Journal of Advanced Research in Computer and Communication Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2278-1021ISSN Print 2319-5940Since 2012
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← Back to VOLUME 5, ISSUE 7, JULY 2016

Design and Simulation of 4T-Cascode Amplifier at 45 Nanometer Technology Node

Arshad Jamal, Dr O.P. Malik

DOI: 10.17148/IJARCCE.2016.5716

Abstract: In this research paper, design and simulation of of 4T-Cascode Amplifier at 45 Nanometer Technology Node has been performed using 45nm technology. DC voltage gain, average power, bandwidth and output resistance have been computed using HSPICE Software. Further, the low voltage Cascode Op Amp has better DC Gain, output resistance and less power dissipation. Thus the simulation studies have revealed that the performance of the low voltage folded cascode Op Amp can be improved optimized at different voltage. DC voltage gain is 35.6 dB, average power is 7.81 uW, bandwidth is 4.08 MHz, Phase Margin 88.30 and Output Resistance 25.16 K-Ohms have been computed using HSPICE Software at 0.9V. DC voltage gain is 13.7 dB, average power is 0.23uW, bandwidth is 110.7 MHz, Phase Margin 95.30 and Output Resistance 9.5 K-Ohms have been computed using HSPICE Software at 1.5V.



Keywords: 4T-Cascode amplifier, DC Gain, Output Resistance, Band width, Average Power.

How to Cite:

[1] Arshad Jamal, Dr O.P. Malik, “Design and Simulation of 4T-Cascode Amplifier at 45 Nanometer Technology Node,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE), DOI: 10.17148/IJARCCE.2016.5716