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Design and Synthesis of 16-bit ALU using Reversible Logic Gates
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How to Cite:
[1] PREMANANDA B S, Y M RAVINDRANATH Department of Telecommunication, R.V. College of Engineering, Bangalore, India Department of Electronics and Communication, M.E.I. Polytechnic, Bangalore, India, “Design and Synthesis of 16-bit ALU using Reversible Logic Gates,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE)
