Design of Reversible Logic ALU using Reversible logic gates with Low Delay Profile

Abstract: Digital system implemented by using conventional gates like AND and OR gates dissipates a major amount of energy in the form of bits which gets erased during logical operations. This problem of energy loss can be solve by using reversible logic circuits in place of conventional circuits. Reversibility has become the most promising technology in digital circuits designing. In today’s world ALU is one of the very important part of any system having many applications in computers, cell phones, calculators etc. In this paper the design of 1-bit reversible ALU using reversible logic gates is proposed. The proposed ALU is analyzed on FPGA SPARTAN6 device. The proposed design is compared in terms of propagation delay, quantum cost and garbage outputs. In this paper the 4-bit reversible ALU is also design on proposed 1- bit reversible ALU architecture.