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International Journal of Advanced Research in Computer and Communication Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2278-1021ISSN Print 2319-5940Since 2012
IJARCCE adheres to the suggestive parameters outlined by the University Grants Commission (UGC) for peer-reviewed journals, upholding high standards of research quality, ethical publishing, and academic excellence.
← Back to VOLUME 4, ISSUE 2, FEBRUARY 2015

FPGA Implementation of Content Addressable Memory Based Information Detection System

Mayuri Soni, Sapana Kukade, Preeti Lawhale

DOI: 10.17148/IJARCCE.2015.4282

Abstract: CAM (content-addressable memory) is a specialized type of high-speed memory� that searches its entire contents in a single clock cycle. We are designing� generalized CAM using Dual Port RAM (random access memory) structure which will perform match operation in addition to read and write operation .The design has fast search capabilities while consuming least system resources as possible.CAM provides performance advantage over other search algorithms as searching is based on content rather than address unlike RAM. The match time of our CAM� �structure is faster and resources are more effective.CAM is used in application where search time is very critical. content addressable memory� compare input search data against stored data and return address of� matched data. Thus overall function of CAM is to take search word and return matching memory location.

 



Keywords: Dual Port , RAM (random access memory), CAM (content-addressable memory), match

How to Cite:

[1] Mayuri Soni, Sapana Kukade, Preeti Lawhale, “FPGA Implementation of Content Addressable Memory Based Information Detection System,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE), DOI: 10.17148/IJARCCE.2015.4282