High Performance DCT Implementation Using Reduced Complexity Wallace Multiplier and High Speed Carry Select Adder

[1] ANJU.S, M.SARAVANAN PG Scholar, Department of ECE, SNS College of Technology, Coimbatore, India Assistant Professor, Department of ECE, SNS College of Technology, Coimbatore, India  , “High Performance DCT Implementation Using Reduced Complexity Wallace Multiplier and High Speed Carry Select Adder,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE)