Implementation of Low power Level Shifter with Logic Error Correction Circuit for Extremely Low-Voltage Digital Circuits

Abstract: This paper presents the design of low power level shifter that can convert extremely low and to higher output voltages. Level shifters are used to convert voltages from one level to other. In Conventional level shifter circuits the output voltage cannot be discharged at low input voltage. In this paper a Level shifter with lower power dissipation is proposed, it consists of a level conversion circuit and logic error correction circuit. Performance of proposed circuit performance is compared in terms of power dissipation and delay with other existing level shifter circuits. The proposed circuit and other existing level shifter circuits used have been simulated using cadence tool in gpdk180nm technology.

Keywords: Level Conversion Circuit, Level shifter (LS), Logic error correction circuit (LECC), Wide swing cascode current mirror.