Implementation of Secure Hash Algorithm-1using FPGA

Abstract: Sharing of information over the internet becoming a critical issue. To secure the data lots of techniques are available. The present work will focus on the combination of hashing, cryptography to secure the data. Hash value will obtained from original data. Secure hash algorithm is use for hash value. Then the data is encrypted by using cryptography algorithm. Now the hash value and encrypted data must be hidden in image or audio or video file to secure the data. At the receiver end the hash value is match and data is decrypted by using decryption technique.

Keywords: FPGA, hash function, Secure Hash Algorithm-1 (SHA-1), Verilog HDL.