Abstract: Because of flexibility of application and highest performance, thrills, and middle end for an obtained extensive market. As a fundamental memory structure. The FIFO is widely used in FPGA based projects. But limited by the resources in chip and imperfections of development tools, the problem of insufficient memory while the overall capacity is often enough occurring in implementation of multi-channel FIFO. This project surveys various occasion applications of FIFO and puts forward the implementation of FIFO Memory Using Shift registers.
Keywords: FIFO, NoC, FPGA, Synchronous, Asynchronous,
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DOI:
10.17148/IJARCCE.2023.12694
