Design And Implantation Of High Speed FFT Processor For OFDMA System Using FPGA

Abstract: OFDM (Orthogonal Frequency Division Multiplexing) is one kind of the techniques of MCM (Multi-Carrier Modulation), which belongs to the field of wireless communication. The basic idea of MCM is to modulate signals onto many carriers and then combine these signals to transmit out. The modulation system has an S/P converter, which converts the high rate serial data into lower rate paralleled data. Due to the lower rate, data has longer time duration which is usually far larger than the maximum delay of the signal transmitting channel, thus makes it possible to well-combat multi-path effect and easy to equalization at the receiver. In the downlink module of Orthogonal Frequency Division Multiple Access (OFDMA) system, there is a need of an alterable point FFT processor. Therefore, it is meaningful to design a FFT processor in which input data points could be alterable. This paper presents the design of a variable input FFT processor which meets the requirements of OFDMA system. To design OFDMA system, we select the 2D Fourier transform algorithm as the kernel algorithm, using VHDL language to present in detail a design of two-stage pipeline structure, QuartusII and ModelSim SE for the simulation, and verify on the EP3C25Q240CSN chip FPGA.Simulation results show that the way of implementation which meets the IEEES02.16e standard, at the same time the data precision is 16 bits, limit the clock frequency of 100MHz, the overall timing design stability, and it could reach the scope of real- time processing

Keywords: OFDM, FFT, MCM, QAM.