πŸ“ž +91-7667918914 | βœ‰οΈ ijarcce@gmail.com
International Journal of Advanced Research in Computer and Communication Engineering
International Journal of Advanced Research in Computer and Communication Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2278-1021ISSN Print 2319-5940Since 2012
IJARCCE adheres to the suggestive parameters outlined by the University Grants Commission (UGC) for peer-reviewed journals, upholding high standards of research quality, ethical publishing, and academic excellence.
← Back to VOLUME 3, ISSUE 2, FEBRUARY 2014

Implementation Of FPGA Based 32 Bit CISC CPU Design

SARASWTHI P, M K CHANDRASEN M.Tech (Student), Department of ECE, Avanthi Institute of Engineering & Tech, Visakhapatnam, India Assistant Prof, Department of ECE, Avanthi Institute of Engineering & Tech, Visakhapatnam, India

πŸ‘ 44 viewsπŸ“₯ 3 downloads
Share: 𝕏 f in ✈ βœ‰
Abstract: Complex Instruction Set Computer (CISC) processors are primarily used in work stations and personal computers. CISC processors with integrated graphics and display systems can be used in car navigation systems, driver information systems etc. It is also applicable in high speed data transmission and real time controlling applications. Taking into consideration all these advantages and applications of CISC processor this work is adopted to design an 8 bit CISC CPU using FPGA.

Keywords: FPGA, CISC, CPU

How to Cite:

[1] SARASWTHI P, M K CHANDRASEN M.Tech (Student), Department of ECE, Avanthi Institute of Engineering & Tech, Visakhapatnam, India Assistant Prof, Department of ECE, Avanthi Institute of Engineering & Tech, Visakhapatnam, India, β€œImplementation Of FPGA Based 32 Bit CISC CPU Design,” International Journal of Advanced Research in Computer and Communication Engineering (IJARCCE)

Creative Commons License This work is licensed under a Creative Commons Attribution 4.0 International License.