International Journal of Advanced Research in Computer and Communication Engineering

A monthly peer-reviewed online and print journal

ISSN Online 2278-1021
ISSN Print 2319-5940

Since 2012

Abstract:  In this paper, a low power ultra-high speedAdder is proposed by utilizing voltage scaling system for FinFET short gate mode technique. AnAdder design is implemented in MOSFET 32nm and also in FinFET 32nm, performance is compared on the basis of Average power Consumption and Delay. A variation of Number of fins versus Average power is also calculated. Simulation results are obtained using Synopsys HSPICE software, and they show that short gate mode Adder technique is low power.  Delay is also improved when FinFETs are used in the Adder.

Keywords: Adder, FinFET, 32nm.

PDF | DOI: 10.17148/IJARCCE.2018.7519

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