Abstract- The operational amplifier is a fundamental building block for electronic devices and systems. The advancement of modern electronic technology has been setting more performance demand on the underlying integrated circuits including the operational amplifier. Reduction in power consumption and improvement in speed are some of the most important requirements. To address these concerns, this thesis presents a design of micropower Class AB operational amplifiers which has the ratio of gain bandwidth product to supply current higher than that of an existing IC. The design is in a 0.6pxm CMOS process. The input stage of the design has the folded-cascode architecture that allows the input common-mode range down to negative supply voltage. The Class AB output stage swings rail-to-rail and has the ratio of maximum current to quiescent current greater than 100. The bias cell of the operational amplifier is designed to consume only 6% of the total supply current. The thesis concludes the operational amplifier design with two frequency compensation options.(cont.) The one with simple Miller compensation has a unity gain frequency of 360kHz with 61.5 degrees of phase margin at 100pF load while consuming 20[mu]A supply current. The other with the hybrid of simple Miller compensation and cascode compensation offers an improved unity gain frequency of 590 kHz at the same loading and power condition.
Keywords - FET,MOSFET, 741 OP-AMPS,CMOS,COMMON- MODE RANGE,POWER-SUPPL REJECTION RATIO,CASCODE,SLEW RATE
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DOI:
10.17148/IJARCCE.2021.10667
